Microelectronic devices, memory devices, and electronic systems
US11917817B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2020 |
| Grant date | Feb 27, 2024 |
| Priority date | — |
| Expiry date | Jul 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microelectronic device comprises a stack structure comprising a vertically alternating sequence of conductive material and insulative material arranged in tiers. The stack structure has blocks separated from one another by first dielectric slot structures. Each of the blocks comprises two crest regions, a stadium structure interposed between the two crest regions in a first horizontal direction and comprising opposing staircase structures each having steps comprising edges of the tiers of the stack structure, and two bridge regions neighboring opposing sides of the stadium structure in a second horizontal direction orthogonal to the first horizontal direction and having upper surfaces substantially coplanar with upper surfaces of the two crest regions. At least one second dielectric slot structure is within horizontal boundaries of the stadium structure in the first horizontal direction and partially vertically extends through and segmenting each of the two bridge regions. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.