Trim values for multi-plane operations
US11922049B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 20, 2021 |
| Grant date | Mar 5, 2024 |
| Priority date | — |
| Expiry date | Aug 20, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A request is received to perform a multi-plane operation for data residing on a first plane and a second plane of a memory device. A first set of trim values is obtained from a first set of registers of the memory device. The first set of trim values corresponds to a first voltage shift for the data at the first plane. A second set of trim values is obtained from a second set of registers of the memory device. The second set of trim values corresponds to a second voltage shift for the data at the second set of trim values for the data at the second plane. The multi-plane operation is performed using at least the first set of trim values for the data at the first plane and at least the second set of trim values for the data at the second plane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.