Storage device and operating method thereof
US11922064B2 · kind B2 · utility
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2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2021 |
| Grant date | Mar 5, 2024 |
| Priority date | — |
| Expiry date | May 14, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage device can control the input/output of data at a high frequency. The storage device includes a memory device and a memory controller for controlling the memory device, and providing the memory device with a command. The memory device includes a memory unit, and an interface chip for performing a training operation in response to the command. The interface chip generates a shift signal according to a first data strobe signal provided from the memory controller, and stores, based on the shift signal, training data provided from the memory controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.