Semiconductor device and method of forming electrical circuit pattern within encapsulant of SIP module
US11923260B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2023 |
| Grant date | Mar 5, 2024 |
| Priority date | — |
| Expiry date | Jan 16, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has an electronic component assembly with a substrate and a plurality of electrical components disposed over the substrate. A conductive post is formed over the substrate. A molding compound sheet is disposed over the electrical component assembly. A carrier including a first electrical circuit pattern is disposed over the molding compound sheet. The carrier is pressed against the molding compound sheet to dispose a first encapsulant over and around the electrical component assembly and embed the first electrical circuit pattern in the first encapsulant. A shielding layer can be formed over the electrical components assembly. The carrier is removed to expose the first electrical circuit pattern. A second encapsulant is deposited over the first encapsulant and the first electrical circuit pattern. A second electrical circuit pattern is formed over the second encapsulant. A semiconductor package is disposed over the first electrical circuit pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.