Patent · US Active

Semiconductor package

US11923342B2 · kind B2 · utility

1Cited by
15References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 28, 2022
Grant dateMar 5, 2024
Priority date
Expiry dateMar 28, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2225/1094
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A package-on-package type package includes a lower semiconductor package and an upper semiconductor package. The lower semiconductor package includes a first semiconductor device including a through electrode, a second semiconductor device disposed on the first semiconductor device and including a second through electrode electrically connected to the first through electrode, a first molding member covering a sidewall of at least one of the first semiconductor device and the second semiconductor device, a second molding member covering a sidewall of the first molding member, and an upper redistribution layer disposed on the second semiconductor device and electrically connected to the second through electrode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.