Superjunction transistor device
US11929395B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2021 |
| Grant date | Mar 12, 2024 |
| Priority date | — |
| Expiry date | Jun 30, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and a transistor device are disclosed. The transistor device includes: a semiconductor body; first regions of a first doping type and second regions of a second doping type in an inner region and an edge region of the semiconductor body; transistor cells in the inner region of the semiconductor body, each transistor cell including a body region and a source region, the transistor cells including a common drain region; and a buffer region arranged between the drain region and the first and second regions. A dopant dose in the first and second regions decreases towards an edge surface of the semiconductor body. A dopant dose in the buffer region decreases towards the edge surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.