Polishing pad, process for preparing the same, and process for preparing a semiconductor device using the same
US11931856B2 · kind B2 · utility
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6Claims
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Key dates
| Filing date | Feb 4, 2022 |
| Grant date | Mar 19, 2024 |
| Priority date | — |
| Expiry date | Feb 9, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3212
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
Embodiments relate to a polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductors, a process for preparing the same, and a process for preparing a semiconductor device using the same. In the polishing pad according to the embodiment, the size (or diameter) and distribution of a plurality of pores are adjusted, whereby the polishing performance such as polishing rate and within-wafer non-uniformity can be further enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.