Signal processing circuit for triple-membrane MEMS device
US11932533B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2020 |
| Grant date | Mar 19, 2024 |
| Priority date | — |
| Expiry date | Jan 11, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04R2410/03
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A triple-membrane MEMS device includes a first membrane, a second membrane and a third membrane spaced apart from one another, wherein the second membrane is between the first membrane and the third membrane, a sealed low pressure chamber between the first membrane and the third membrane, a first stator and a second stator in the sealed low pressure chamber, and a signal processing circuit configured to read-out output signals of the triple-membrane MEMS device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.