Method for manufacturing semiconductor structure
US11942376B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2022 |
| Grant date | Mar 26, 2024 |
| Priority date | — |
| Expiry date | Aug 8, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of manufacturing a semiconductor structure are provided. One of the methods includes: receiving a substrate including a first conductive region of a first transistor and a second conductive region of a second transistor, wherein the first transistor and the second transistor have different conductive types; performing an amorphization on the first conductive region and the second conductive region; performing an implantation over the first conductive region of the first transistor; forming a contact material layer over the first conductive region and the second conductive region; performing a thermal anneal on the first conductive region and the second conductive region; and performing a laser anneal on the first conductive region and the second conductive region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.