Substrate with thermal insulation
US11942393B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Feb 4, 2020 |
| Grant date | Mar 26, 2024 |
| Priority date | — |
| Expiry date | Jul 26, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/81815
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments herein relate to systems, apparatuses, or processes directed to a substrate that includes a first region to be coupled with a die, and a second region separate and distinct from the first region that has a lower thermal conductivity than the first region, where the second region is to thermally insulate the first region when the die is coupled to the first region. The thermal insulation of the second region may be used during a TCB process to increase the quality of each of the interconnects of the die by promoting a higher temperature at the connection points to facilitate full melting of solder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.