Semiconductor device package with exposed bond wires
US11942459B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2022 |
| Grant date | Mar 26, 2024 |
| Priority date | — |
| Expiry date | Dec 10, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/1064
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device package includes a first substrate having an electrical circuit, semiconductor dies stacked one on top of the other, and bond wires electrically connected one to another. The bond wires electrically couple the semiconductor dies to one another and to the electrical circuit. There is a first bond wire having a first portion connected to a first semiconductor die, a second portion connected to a second semiconductor die, and an intermediate portion between the first portion and second portion. The semiconductor device package further includes a molding compound encapsulating the semiconductor dies, and the first and second portions of the first bond wire. The intermediate portion of the first bond wire is exposed along a top planar surface of the molding compound. The semiconductor device package may be used for coupling one or more other semiconductor device packages thereto via the exposed intermediate portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.