Low-power static signoff verification from within an implementation tool
US11947885B1 · kind B1 · utility
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20Claims
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Key dates
| Filing date | Sep 22, 2021 |
| Grant date | Apr 2, 2024 |
| Priority date | — |
| Expiry date | Apr 18, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one aspect, a method includes invoking a signoff tool via a first command from an implementation tool running on a register transfer level (RTL) design, and executing a native command of the signoff tool from within the implementation tool. The native command generates a notification. The method also includes determining whether the RTL design passes a low-power signoff check based on the notification and sending the design for final signoff verification based on the determination that the RTL design passes the low-power signoff checks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.