Implementation of deep neural networks for testing and quality control in the production of memory devices
US11947890B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | May 8, 2020 |
| Grant date | Apr 2, 2024 |
| Priority date | — |
| Expiry date | Feb 2, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are presented for the application of neural networks to the fabrication of integrated circuits and electronic devices, where example are given for the fabrication of non-volatile memory circuits and the mounting of circuit components on the printed circuit board of a solid state drive (SSD). The techniques include the generation of high precision masks suitable for analyzing electron microscope images of feature of integrated circuits and of handling the training of the neural network when the available training data set is sparse through use of a generative adversary network (GAN).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.