Systems and methods for reading and writing sparse data in a neural network accelerator
US11954025B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2023 |
| Grant date | Apr 9, 2024 |
| Priority date | — |
| Expiry date | Mar 24, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein includes a system, a method, and a device for reading and writing sparse data in a neural network accelerator. A mask identifying byte positions within a data word having non-zero values in memory can be accessed. Each bit of the mask can have a first value or a second value, the first value indicating that a byte of the data word corresponds to a non-zero byte value, the second value indicating that the byte of the data word corresponds to a zero byte value. The data word can be modified to have non-zero byte values stored at an end of a first side of the data word in the memory, and any zero byte values stored in a remainder of the data word. The modified data word can be written to the memory via at least a first slice of a plurality of slices that is configured to access the first side of the data word in the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.