Source or drain structures with high phosphorous dopant concentration

US11955482B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Robert Ehlert · Portland, US
• Timothy Jen · Hillsboro, US
• Alexander Badmaev · Hillsboro, US
• Shridhar Hegde · Beaverton, US
• Sandrine CHARUE-BAKKER · Portland, US

Key dates

• Filing date: May 18, 2020
• Grant date: Apr 9, 2024
• Expiry date: Aug 9, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

Integrated circuit structures having high phosphorous dopant concentrations are described. In an example, an integrated circuit structure includes a fin having a lower fin portion and an upper fin portion. A gate stack is over the upper fin portion of the fin, the gate stack having a first side opposite a second side. A first source or drain structure includes an epitaxial structure embedded in the fin at the first side of the gate stack. A second source or drain structure includes an epitaxial structure embedded in the fin at the second side of the gate stack. Each of the epitaxial structures of the first and second source or drain structures includes silicon and phosphorous, the phosphorous having an atomic concentration in a core region of the silicon greater than an atomic concentration in a peripheral region of the silicon.