Time domain multiply and accumulate system
US11960854B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2020 |
| Grant date | Apr 16, 2024 |
| Priority date | — |
| Expiry date | Jan 15, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multiply-accumulate computation is performed using digital logic circuits. To perform the computation, a plurality of target signals are received at a respective plurality of ripple counters. The counter outputs of the respective ripple counters are scaled by setting stop count values. Counter outputs of the respective ripple counters are adjusted with respective constant values by setting counter reset values at the respective ripple counters. Each count pulses of the target signals for an adjusted period. The count values of the ripple counters are summed. The results may be used to calculate an average value for an adaptive voltage and frequency scaling process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.