Extrinsic field termination structures for improving reliability of high-voltage, high-power active devices
US11961888B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2019 |
| Grant date | Apr 16, 2024 |
| Priority date | — |
| Expiry date | Feb 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/256
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Extrinsic structures formed outside the active regions of active devices can influence aging characteristics and performance of the active devices. An example integrated device including such an intrinsic structure includes a semiconductor device having an active region in a conduction layer, an isolation region in the conduction layer, an insulating layer formed over at least a portion of the active region and over at least a portion of the isolation region, a via outside the active region, and a conductive interconnect. The isolation region extends around the semiconductor device in an area outside the active region. The via extends through the insulating layer and down to the isolation region in the conduction layer, and the conductive interconnect is formed directly on the isolation region in the conduction layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.