Lithographic overlay correction and lithographic process
US11966170B2 · kind B2 · utility
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1References
20Claims
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Key dates
| Filing date | Oct 27, 2020 |
| Grant date | Apr 23, 2024 |
| Priority date | — |
| Expiry date | Nov 25, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/682
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method includes receiving a wafer, measuring a surface topography of the wafer; calculating a topographical variation based on the surface topography measurement performing a single-zone alignment compensation when the topographical variation is less than a predetermined value or performing a multi-zone alignment compensation when the topographical variation is greater than the predetermined value; and performing a wafer alignment according to the single-zone alignment compensation or the multi-zone alignment compensation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.