Level two first-in-first-out transmission
US11966777B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2022 |
| Grant date | Apr 23, 2024 |
| Priority date | — |
| Expiry date | Mar 6, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/503
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hardware state machine connected to a processor, the hardware state machine configured to receive operational codes from the processor; a multiplexer connected to the processor, the hardware state machine and a checksum circuit, the multiplexer configured to receive data from the processor; and a transmit circuit connected to the multiplexer, the transmit circuit configured to receive data from the multiplexer for transmission to a far end device, wherein the hardware state machine is further configured to, responsive receiving one or more operational codes from the processor: cause the checksum circuit to alter a checksum value of a first data packet being transmitted by the transmit circuit; and cause the transmit circuit to preempt transmission of the first data packet and begin transmitting a second data packet once the checksum value so altered has been transmitted from the transmit circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.