Patent · US Active

SCR structure for ESD protection in SOI technologies

US11967639B2 · kind B2 · utility

0Cited by

1References

20Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Gernot Langguth · Oberhaching, DE
Anton Boehm · Munich, DE
Christian Russ · Diedorf, DE
Mirko Scholz · Leuven, BE

Key dates

Filing date	Jan 26, 2022
Grant date	Apr 23, 2024
Priority date	—
Expiry date	Jun 25, 2042

Classification

Technology area (CPC H)Electricity
CPC primaryH10D89/921
WIPO fieldElectrical machinery, apparatus, energy
WIPO sectorElectrical engineering

Abstract

In accordance with an embodiment, a semiconductor device includes: an n-doped region disposed over an insulating layer; a p-doped region disposed over the insulating layer adjacent to the n-doped region, where an interface between the n-doped region and the p-doped region form a first diode junction; a plurality of segmented p-type anode regions disposed over the insulating layer, each of the plurality of segmented p-type anode regions being surrounded by the n-doped region, where a doping concentration of the plurality of segmented p-type anode regions is greater than a doping concentration of the p-doped region; and a plurality of segmented n-type cathode regions disposed over the insulating layer. Each of the plurality of segmented n-type cathode regions are surrounded by the p-doped region, where a doping concentration of the plurality of segmented n-type cathode regions is greater than a doping concentration of the n-doped region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.