Three-dimensional semiconductor memory devices
US11968836B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2022 |
| Grant date | Apr 23, 2024 |
| Priority date | — |
| Expiry date | Oct 28, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K19/201
Abstract
Three-dimensional (3D) semiconductor memory devices are provided. A 3D semiconductor memory device includes an electrode structure on a substrate. The electrode structure includes gate electrodes stacked on the substrate. The gate electrodes include electrode pad regions. The 3D semiconductor memory device includes a dummy vertical structure penetrating one of the electrode pad regions. The dummy vertical structure includes a dummy vertical semiconductor pattern and a contact pattern extending from a portion of the dummy vertical semiconductor pattern toward the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.