Semiconductor device structure with inner spacer layer and method for forming the same
US11973129B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2023 |
| Grant date | Apr 30, 2024 |
| Priority date | — |
| Expiry date | Mar 13, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor device structure is provided. The semiconductor device includes forming nanowire structures stacked over a substrate and spaced apart from one another, and forming a dielectric material surrounding the nanowire structures. The dielectric material has a first nitrogen concentration. The method also includes treating the dielectric material to form a treated portion. The treated portion of the dielectric material has a second nitrogen concentration that is greater than the first nitrogen concentration. The method also includes removing the treating portion of the dielectric material, thereby remaining an untreated portion of the dielectric material as inner spacer layers; and forming the gate stack surrounding nanowire structures and between the inner spacer layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.