Source or drain structures for germanium N-channel devices

US11973143B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Ryan Keech · Portland, US
• Benjamin Chu-Kung · Portland, US
• Subrina RAFIQUE · Hillsboro, US
• Devin Merrill · McMinnville, US
• Ashish Agrawal · Hillsboro, US
• Harold W. Kennel · Portland, US
• Yang Cao · Niskayuna, US
• Dipanjan Basu · Hillsboro, US
• Jessica M. Torres · Portland, US
• Anand S. Murthy · Beaverton, US

Key dates

• Filing date: Mar 28, 2019
• Grant date: Apr 30, 2024
• Expiry date: Feb 14, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/832
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Integrated circuit structures having source or drain structures and germanium N-channels are described. In an example, an integrated circuit structure includes a fin having a lower fin portion and an upper fin portion, the upper fin portion including germanium. A gate stack is over the upper fin portion of the fin. A first source or drain structure includes an epitaxial structure embedded in the fin at a first side of the gate stack. A second source or drain structure includes an epitaxial structure embedded in the fin at a second side of the gate stack. Each epitaxial structure includes a first semiconductor layer in contact with the upper fin portion, and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer comprises silicon, germanium and phosphorous, and the second semiconductor layer comprises silicon and phosphorous.