Manufacturing method of a memory and a memory

US11974427B2 · kind B2 · utility

Assignee

• CHANGXIN MEMORY TECHNOLOGIES, INC. · CN

Inventors

• Er-Xuan Ping · Boise, US
• Zhen Zhou · Emeryville, US
• Lingguo Zhang · Hefei, CN

Key dates

• Filing date: Nov 24, 2021
• Grant date: Apr 30, 2024
• Expiry date: Nov 24, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/30

Abstract

A manufacturing method of a memory includes: providing a substrate and a bit line contact layer; forming a dummy bit line structure on top of the bit line contact layer; forming a spacer layer on the sidewall of both the dummy bit line structure and the bit line contact layer; forming a dielectric layer on the sidewall of the spacer layer; forming a sacrificial layer filling the area between adjacent dummy bit line structures, wherein the sacrificial layer covers the sidewall of the dielectric layer; after the sacrificial layer is formed, removing the dummy bit line structure; forming a bit line conductive portion which fills the hole and covers the bit line contact layer; and, after the bit line conductive portion is formed, removing the spacer layer.