Approach for enabling concurrent execution of host memory commands and near-memory processing commands
US11977782B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2022 |
| Grant date | May 7, 2024 |
| Priority date | — |
| Expiry date | Jul 14, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An approach allows concurrent execution of near-memory processing commands, referred to herein as “PIM commands,” and host memory commands. A memory controller determines and issues a plurality of register-only PIM commands that do not reference memory with host memory commands to allow concurrent execution of the register-only PIM commands and the host memory commands. The approach allows concurrent execution of register-only PIM commands and host memory commands without interference, even when the register-only PIM commands and the host memory commands are interleaved, and even for the same memory module, which improves resource utilization and performance. Further improvement of resource utilization and performance is achieved by extending a register-only phase by reordering register-only PIM commands before non-register-only PIM commands, subject to dependency constraints, and using shadow row buffers to provide local working copies of data from memory to near-memory compute elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.