Void free low stress fill
US11978666B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2019 |
| Grant date | May 7, 2024 |
| Priority date | — |
| Expiry date | Jan 28, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided herein are methods of depositing low stress and void free metal films in deep features and related apparatus. Embodiments of the methods include treating the sidewalls of the holes to inhibit metal deposition while leaving the feature bottom untreated. In subsequent deposition operations, metal precursor molecules diffuse to the feature bottom for deposition. The process is repeated with subsequent inhibition operations treating the remaining exposed sidewalls. By repeating inhibition and deposition operations, high quality void free fill can be achieved. This allows high temperature, low stress deposition to be performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.