Power semiconductor module arrangement
US11978700B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2022 |
| Grant date | May 7, 2024 |
| Priority date | — |
| Expiry date | Jul 25, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1815
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power semiconductor module arrangement includes two or more individual semiconductor devices arranged on a base layer. Each semiconductor device includes a lead frame, a semiconductor body arranged on the lead frame, and a molding material enclosing the semiconductor body and at least part of the lead frame. A frame is arranged on the base layer such that the frame surrounds the two or more individual semiconductor devices. A casting compound at least partly fills a capacity formed by the base layer and the frame, such that the casting compound at least partly encloses the two or more individual semiconductor devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.