Method of fabricating semiconductor devices including a fin field effect transistor
US11978775B2 · kind B2 · utility
0Cited by
30References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2022 |
| Grant date | May 7, 2024 |
| Priority date | — |
| Expiry date | Jan 13, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprising a gate electrode on a substrate, a source/drain pattern on the substrate on a side of the gate electrode, and a gate contact plug on the gate electrode are disclosed. The gate contact plug may include a first gate contact segment, and a second gate contact segment that extends in a vertical direction from a top surface of the first gate contact segment. An upper width of the first gate contact segment may be greater than a lower width of the second gate contact segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.