Robust analog counter
US11979676B2 · kind B2 · utility
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18Claims
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Key dates
| Filing date | Apr 26, 2022 |
| Grant date | May 7, 2024 |
| Priority date | — |
| Expiry date | Jun 21, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/702
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A robust analog counter that may include an output capacitor having a first capacitance, and a charging unit (CU) that is configured to determine that an event to be counted occurred, and charge the output capacitor at a first current and during a output capacitor charging period, wherein a duration of the output capacitor charging period is proportional to the first capacitance, thereby increasing an output voltage of the output capacitor by a voltage quote that is indifferent to at least one out of process variation, temperature or power supply voltage value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.