Patent · US Active

Check tool and check method for design rule check rule deck of integrated circuit layout

US11983480B2 · kind B2 · utility

0Cited by

3References

14Claims

0Family size

Assignee

CHANGXIN MEMORY TECHNOLOGIES, INC. · CN

Inventors

Chuanjiang Chen · Hefei, CN
Li Bai · Hefei, CN
Kang Zhao · Hefei, CN

Key dates

Filing date	Aug 11, 2021
Grant date	May 14, 2024
Priority date	—
Expiry date	Sep 22, 2042

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/392
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments of the application disclose a check tool and a check method for a Design Rule Check (DRC) rule deck of an integrated circuit layout. The check tool (100) for the DRC rule deck of the integrated circuit layout includes: an intelligent database creation engine (110), configured to generate a test case database; an intelligent arrangement engine (120), configured to generate a standard integrated circuit layout (150) according to the test case database; and an intelligent detection and analysis engine (130), configured to detect and analyze a target DRC rule deck (140) of the integrated circuit layout according to the standard integrated circuit layout (150).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.