Patent · US Active

Method for producing a thermal infrared sensor array in a vacuum-filled wafer-level housing

US11988561B2 · kind B2 · utility

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17Claims
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Key dates

Filing dateJul 9, 2020
Grant dateMay 21, 2024
Priority date
Expiry dateMar 10, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01J2005/106
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A method for producing a thermal infrared sensor array in a vacuum-filled wafer-level housing with particularly small dimensions, consisting of at least two wafers, a cover wafer and a central wafer comprising multiple infrared-sensitive sensor pixels on a respective thin slotted membrane over a heat-insulating cavity is disclosed. A method for producing a high-resolution monolithic silicon micromechanical thermopile array sensor using wafer level packaging technology, wherein the sensor achieves a particularly high spatial resolution capability and a very high filling degree with very small housing dimensions, in particular a very low overall thickness, and can be inexpensively produced using standard CMOS processes. This is achieved in that the cover wafer is first rigidly mechanically connected to the provided central wafer comprising the sensor pixels with the infrared-sensitive pixels by means of wafer bonding, and the central wafer is then thinned out from the wafer rear face to a specified thickness.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.