Programmable address range engine for larger region sizes
US11989135B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2020 |
| Grant date | May 21, 2024 |
| Priority date | — |
| Expiry date | Jun 24, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/683
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Examples described herein relate to a computing system supporting custom page sized ranges for an application to map contiguous memory regions instead of many smaller sized pages. An application can request a custom range size. An operating system can allocate a contiguous physical memory region to a virtual address range by specifying a custom range sizes that are larger or smaller than the normal general page sizes. Virtual-to-physical address translation can occur using an address range circuitry and translation lookaside buffer in parallel. The address range circuitry can determine if a custom entry is available to use to identify a physical address translation for the virtual address. Physical address translation can be performed by transforming the virtual address in some examples.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.