Patent · US Active

Memory controller and memory system including the same

US11989448B2 · kind B2 · utility

0Cited by
1References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 16, 2022
Grant dateMay 21, 2024
Priority date
Expiry dateAug 16, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F3/0683
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Provided herein may be a memory controller and a memory system including the same. The memory controller includes a scanning period controller configured to reset, whenever scanning points sequentially arrive, access information indicating whether each of a plurality of pages is accessed, and set a scanning interval for each of the pages between the scanning points for the page based on an attribute of the page, an attribute determiner configured to determine, as a hot page or a cold page, the attribute of each of the pages based on an access interval for the page from the first scanning point among the scanning points for the page to time at which access to data stored in the page is requested, and a memory allocator configured to control first and second memory devices based on the attributes of the pages.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.