One time programmable (OTP) memory array and read and write method thereof
US11990193B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2022 |
| Grant date | May 21, 2024 |
| Priority date | — |
| Expiry date | Jan 11, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A one time programmable OTP memory array and a read and write method thereof are provided. The OTP memory array includes M×N OTP memories, the OTP memories each include a storage MOS transistor, a first MOS transistor, a second MOS transistor and a detection MOS transistor, an isolation module is disposed between a control terminal of the detection MOS transistor and the storage MOS transistor; the isolation module includes at least one isolation MOS transistor; and in the array, a gate of each storage MOS transistor is connected to a same storage control point, each isolation MOS transistor is distinguished based on a distance from the storage MOS transistor, and gates of isolation MOS transistors with a same distance from the storage MOS transistor are connected to a same isolation control point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.