Semiconductor package including under bump metallization pad
US11990439B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2021 |
| Grant date | May 21, 2024 |
| Priority date | — |
| Expiry date | Jun 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/0401
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package including a semiconductor chip; a lower redistribution layer on a lower surface of the semiconductor chip; a lower passivation layer on a lower surface of the lower redistribution layer; a UBM pad on the lower passivation layer and including an upper pad and a lower pad connected to the upper pad, the upper pad having a greater horizontal length at an upper surface thereof than a horizontal length at a lower surface thereof; a seed layer between the lower passivation layer and the UBM pad; and an external connecting terminal on a lower surface of the UBM pad, wherein the seed layer includes a first seed part covering a side surface of the upper pad, a second seed part covering a portion of the lower surface of the upper pad, and a third seed part covering a portion of a side surface of the lower pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.