Method for forming a semiconductor structure having second isolation structures located between adjacent active areas

US11991876B2 · kind B2 · utility

Assignee

• CHANGXIN MEMORY TECHNOLOGIES, INC. · CN

Inventors

• Junbo PAN · Hefei, CN
• Jinghao WANG · Hefei, CN

Key dates

• Filing date: Jan 7, 2022
• Grant date: May 21, 2024
• Expiry date: Nov 21, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/34

Abstract

Provided are a semiconductor structure and a method for forming same. The method includes the following operations. Active areas and first isolation structures disposed at intervals are provided. Second isolation structures located between adjacent active areas are provided, and top surfaces of the second isolation structures are higher than or flush with top surfaces of the active areas. A mask layer are formed, pattern openings of which expose part of the top surfaces of the active areas, and the second isolation structures are located at two opposite sides of part of the active areas. The part of the active areas exposed by the pattern openings and part of the first isolation structures are etched to form intermediate grooves at least exposing part of surfaces of the active areas. Bit line structures are formed, which are electrically connected to top surfaces exposed by the intermediate grooves.