Crystal efficient SiC device wafer production
US11996330B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 20, 2020 |
| Grant date | May 28, 2024 |
| Priority date | — |
| Expiry date | Jan 22, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P80/30
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There is provided a method for manufacturing a SiC device wafer comprising the steps: a) slicing and polishing a SiC boule to thicker substrates compared to the usual thickness in the prior art, b) creating a device wafer on the substrate, c) removing the device wafer from the remaining substrate, d) adding SiC to the remaining substrate so that the original thickness of the substrate is essentially restored, and repeating steps b)-d). The removal of the device wafer can be made for instance by laser slicing. Advantages include that the SiC material loss is significantly decreased and the boule material used for device wafers is considerably increased, the substrates become more stable especially during high temperature processes, the warp and bow is reduced, the risk of breakage is decreased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.