Semiconductor device having a passivation layer and method of making
US12002771B2 · kind B2 · utility
0Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 13, 2021 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Aug 7, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/381
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a conductive pad over an interconnect structure, wherein the conductive pad is electrically connected to an active device. The semiconductor device further includes a dielectric layer over the conductive pad, wherein the dielectric layer has a first conformity. The semiconductor device further includes a passivation layer over the dielectric layer, wherein the passivation layer has a second conformity different from the first conformity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.