Binning in hybrid pixel structure of image pixels and event vision sensor (EVS) pixels
US12003870B2 · kind B2 · utility
1Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2022 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Apr 15, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/8023
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Binning in a hybrid pixel structure of image pixels and event vision sensor (EVS) pixels. In one embodiment, the imaging sensor includes a pixel array including a plurality of pixel circuits and a plurality of binning transistors. A first portion of the plurality of pixel circuits individually includes an intensity photodiode. A second portion of the plurality of pixel circuits individually includes an event vision sensor (EVS) photodiode. The plurality of binning transistors is configured to bin together at least one of the first portion or the second portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.