Metal-insulator-metal (MIM) capacitor structure for layer count reduction and lower capacitance variation
US12009292B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2021 |
| Grant date | Jun 11, 2024 |
| Priority date | — |
| Expiry date | Aug 1, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L24/13
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) includes a substrate and a first metal-insulator-metal (MIM) capacitor. The first MIM capacitor includes a first plate comprising a first metallization layer on a surface of the substrate. The first MIM capacitor also includes a first MIM insulator layer on a first portion of a surface of the first plate, a sidewall of the first plate, and a first portion of the surface of the substrate. The first MIM capacitor further includes a second plate on the first MIM insulator layer and on a second portion of the surface of the substrate, the second plate comprising a second metallization layer. The IC also includes an inductor comprising a portion of the second plate on the second portion of the surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.