Patent · US Active

Slew rate control for fast switching output stages

US12009807B2 · kind B2 · utility

0Cited by
4References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 15, 2022
Grant dateJun 11, 2024
Priority date
Expiry dateFeb 15, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03F2203/45248
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A drive circuit configured to apply a slew rate controlled drive signal to the control terminal of a power transistor. The drive circuit may be part of a system that includes one or more sub-circuits in which each sub-circuit includes a regulation loop, a matched replica of the power transistor and regulated voltage node. The voltage reference voltage for each sub-circuit connects to the control terminal of the power switch through a buffer circuit to apply a sequence of voltages to the control terminal of the power switch. A switching controller circuit may manage the operation of the one or more sub-circuits so that the drive circuit may output a precisely controlled voltage profile to the control terminal of the power transistor. The circuit may include a second buffer under the control of the switching controller circuit to further manage the operation of the power transistor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.