Directed self-assembly structures and techniques
US12012473B2 · kind B2 · utility
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Key dates
| Filing date | Sep 25, 2020 |
| Grant date | Jun 18, 2024 |
| Priority date | — |
| Expiry date | Jun 2, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/528
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are structures and techniques utilizing directed self-assembly for microelectronic device fabrication. For example, a microelectronic structure may include a patterned region including a first conductive line and a second conductive line, wherein the second conductive line is adjacent to the first conductive line; and an unordered region having an unordered lamellar pattern, wherein the unordered region is coplanar with the patterned region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.