Moisture hermetic guard ring for semiconductor on insulator devices
US12014996B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2020 |
| Grant date | Jun 18, 2024 |
| Priority date | — |
| Expiry date | Aug 3, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Moisture hermetic guard ring structures for semiconductor devices, related systems, and methods of fabrication are disclosed. Such devices systems, and methods include a guard ring structure laterally surrounding semiconductor devices of a device layer and metal interconnects of an interconnect layer, the guard ring structure extending through the interconnect layer, the device layer, and a bonding layer adjacent one of the interconnect layer or the device layer the bonding layer, and contacting a support substrate coupled to the bonding layer. Such devices systems, and methods may further include via structures having the same material system as the guard ring structure and also extending through the interconnect, the device, and bonding layers and contacting a support substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.