Optimizing use of computer resources in implementing circuit designs through machine learning

US12019964B1 · kind B1 · utility

Assignee

• XILINX, INC. · US

Inventors

• Karthic P · Chennai, IN
• Paul D. Kundarewich · Toronto, CA
• Satish B. Sivaswamy · Fremont, US
• Meghraj Kalase · Hyderabad, IN
• Vishal Tripathi · Hyderabad, IN
• Srinivasan Dasasathyan · Secunderabad, IN
• Mehrdad Eslami Dehkordi · San Jose, US
• Xiaojian Yang · Sunnyvale, US
• Amish Pandya · San Ramon, US

Key dates

• Filing date: Jul 15, 2021
• Grant date: Jun 25, 2024
• Expiry date: May 17, 2042

Classification

• Technology area (CPC G): Physics
• CPC primary: G06N20/00
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Methods and systems for selecting between single-process and multi-process implementation flows involve identifying features of a circuit design by a design tool. A classification model is applied to the features. The classification model indicates whether an implementation flow on the circuit design is likely to have a runtime within a first range of runtimes or a runtime within a second range of runtimes. The implementation flow is executed by the design tool in a single process in response to the classification model indicating the implementation flow on the circuit design is likely to have a runtime within the first range of runtimes. The implementation flow is executed by the design tool in a plurality of processes in response to the classification model indicating the implementation flow on the circuit design is likely to have a runtime within the second range of runtimes.