Method of manufacturing semiconductor devices and semiconductor devices
US12020947B2 · kind B2 · utility
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14References
20Claims
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Key dates
| Filing date | Jul 19, 2021 |
| Grant date | Jun 25, 2024 |
| Priority date | — |
| Expiry date | Jul 29, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/661
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of manufacturing a semiconductor device, a gate dielectric layer is formed over a channel region, a first conductive layer is formed over the gate dielectric layer, a protective layer is formed at a surface region of the first conductive layer, a metallic layer is formed by applying a metal containing gas on the protective layer, and the metallic layer is removed by a wet etching operation using a solution. The protective layer is resistant to the solution of the wet etching operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.