Method for semiconductor device interface circuitry functionality and compliance testing
US12025663B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2020 |
| Grant date | Jul 2, 2024 |
| Priority date | — |
| Expiry date | Dec 4, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R35/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method is provided for testing the functionality of a device under test interface circuitry located between automated testing equipment (ATE) and a device under test (DUT). The method includes disconnecting the device under test from the device under test interface circuitry, utilizing a Source Measurement Unit (SMU) that generates and measures voltage and current and uses force and sense lines, and testing a switch located in the device under test interface circuitry using a two-state alarm process. The method also includes applying a voltage using the a voltage source measurement device in a first state in which force and sense lines of the voltage source measurement device are connected in the device under test interface circuitry. The method further includes detecting whether an alarm signal due to an open circuit has been activated, and determining that the switch being tested in the device under test interface circuitry is operating properly by the absence of the alarm signal being activated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.