Source or drain structures with high germanium concentration capping layer

US12027417B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Cory Bomberger · Portland, US
• Suresh Vishwanath · Portland, US
• Yulia Tolstova · Hillsboro, US
• Pratik A. Patel · Berkeley, US
• Szuya S. Liao · Portland, US
• Anand S. Murthy · Beaverton, US

Key dates

• Filing date: Jun 26, 2020
• Grant date: Jul 2, 2024
• Expiry date: Nov 3, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/832
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Integrated circuit structures having source or drain structures with a high germanium concentration capping layer are described. In an example, an integrated circuit structure includes source or drain structures including an epitaxial structure embedded in a fin at a side of a gate stack. The epitaxial structure has a lower semiconductor layer and a capping semiconductor layer on the lower semiconductor layer with an abrupt interface between the capping semiconductor layer and the lower semiconductor layer. The lower semiconductor layer includes silicon, germanium and boron, the germanium having an atomic concentration of less than 40% at the abrupt interface. The capping semiconductor layer includes silicon, germanium and boron, the germanium having an atomic concentration of greater than 50% at the abrupt interface and throughout the capping semiconductor layer.