Patent · US Active

Source or drain structures with low resistivity

US12027585B2 · kind B2 · utility

0Cited by

2References

20Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Cory Bomberger · Portland, US
Anand S. Murthy · Beaverton, US
Suresh Vishwanath · Portland, US

Key dates

Filing date	Feb 15, 2023
Grant date	Jul 2, 2024
Priority date	—
Expiry date	Feb 15, 2043

Classification

Technology area (CPC H)Electricity
CPC primaryH10D62/832
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Integrated circuit structures having source or drain structures with low resistivity are described. In an example, integrated circuit structure includes a fin having a lower fin portion and an upper fin portion. A gate stack is over the upper fin portion of the fin, the gate stack having a first side opposite a second side. A first source or drain structure includes an epitaxial structure embedded in the fin at the first side of the gate stack. A second source or drain structure includes an epitaxial structure embedded in the fin at the second side of the gate stack. Each epitaxial structure of the first and second source or drain structures include silicon, germanium and boron. The first and second source or drain structures have a resistivity less than or equal to 0.3 mOhm·cm.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.