Fast effective resistance estimation using machine learning regression algorithms
US12032889B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Mar 2, 2021 |
| Grant date | Jul 9, 2024 |
| Priority date | — |
| Expiry date | Jun 14, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N20/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments of a method and apparatus for estimating the effective resistance for the design of on-chip power nets are disclosed. Through sampled node resistance, performance of a power net can be determined on an entire chip. Effective resistance predictions can be made for all nodes. Through the resistance predictions, a designer can analyze the which areas would benefit from power and ground augmentation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.