Compiling system and compiling method for programmable network element
US12032933B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2023 |
| Grant date | Jul 9, 2024 |
| Priority date | — |
| Expiry date | Oct 26, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/44505
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure discloses a compiling system for a compiling system and a compiling method for a programmable network element. Aiming at the diversified requirements of network modals for the underlying hardware resources, the system realizes the integration and fusion mechanism of computing/storage/forwarding/security, and abstracts network element equipment including heterogeneous hardware resources and isomeric hardware resources into a logical network element irrelevant to the underlying hardware; performs advanced abstract encapsulation on the heterogeneous hardware resources and isomeric hardware resources, supports flexible calling of underlying hardware and software resources, uses the technology of functional equivalent replacement between heterogeneous hardware resources and isomeric hardware resources, realizes switching and co-processing of network modals among hardware resources according to actual requirements, allocates heterogeneous hardware resources according to modal characteristics, and calls various compilers to automatically generate and optimize modal packet processing pipelines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.